Mohamad Mroue
11 months ago
FPGA-Based Implementation Study of an Encrypted Federated Learning System for IoT Devices CentraleSupélec, Université Paris-Saclay in France
Degree Level
PhD
Field of study
Computer Science
Funding
Full funding availableDeadline
December 31, 2026
Country
France
University
University Name
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Where to contact
Official Email
Keywords
Computer Science
Mechanical Engineering
Electrical Engineering
Information Technology
Mathematics
Artificial Intelligence
Energy Efficiency
Federated Learning
Hardware Engineering
Digital Design
Data Security
Processor Architecture
Fpga Design
Embedded System
Statistic
Machine learning
About this position
?? PhD Position – CentraleSupélec, Université Paris-Saclay
?? Start Date: October 1, 2025
?? Application Deadline: April 28, 2025
??? Laboratory: GeePs – Group of Electrical Engineering – Paris (UMR 8507), CCS Research Team.
We are pleased to announce the opening of a fully-funded PhD position at CentraleSupélec – Université Paris-Saclay, within the GeePs laboratory (CCS research team). This thesis investigates key challenges at the intersection of embedded AI, secure federated learning, and hardware acceleration, with the objective of developing intelligent, energy-efficient, and privacy-preserving architectures for the next generation of connected devices.
?? Thesis Title
FPGA-Based Implementation Study of an Encrypted Federated Learning System for IoT Devices
?? Scientific Context and Motivation
The growing demand for embedded AI in IoT devices raises critical questions related to data privacy, computational efficiency, and energy autonomy. Federated Learning (FL) has emerged as a promising paradigm for decentralized model training, allowing data to remain local. However, combining FL with Homomorphic Encryption (HE) to ensure strong privacy introduces significant technical challenges when deployed on resource-constrained platforms.
This thesis aims to address these challenges through an FPGA-based hardware architecture, designed to support both FL and HE in a form factor suitable for portable and embedded systems.
?? Objectives:
This thesis aims to propose and evaluate a reconfigurable hardware architecture based on FPGA capable of implementing FL and HE in a resource- and energy-efficient manner. The work will involve:
- Optimizing embedded AI algorithms for hardware acceleration.
- Designing efficient hardware implementations of homomorphic encryption schemes.
- Exploring hybrid hardware/software co-design approaches.
- Developing advanced energy management strategies for autonomy.
?? Keywords:
Federated Learning · Homomorphic Encryption · FPGA · Embedded AI · IoT · Energy Optimization.
?? Supervision:
The research project will be conducted under the supervision of a multidisciplinary team from CentraleSupélec and other academic partners, combining expertise in digital systems, AI, and secure computing.
?? Candidate Profile:
We are looking for a highly motivated candidate with a strong academic background in embedded systems, digital design, and applied machine learning. Familiarity with fundamental concepts in data security, as well as experience with FPGA development tools and hardware/software co-design will be considered an asset.
?? Applications are open until April 28, 2025.
?? Start Date: October 1, 2025
?? Application Deadline: April 28, 2025
??? Laboratory: GeePs – Group of Electrical Engineering – Paris (UMR 8507), CCS Research Team.
We are pleased to announce the opening of a fully-funded PhD position at CentraleSupélec – Université Paris-Saclay, within the GeePs laboratory (CCS research team). This thesis investigates key challenges at the intersection of embedded AI, secure federated learning, and hardware acceleration, with the objective of developing intelligent, energy-efficient, and privacy-preserving architectures for the next generation of connected devices.
?? Thesis Title
FPGA-Based Implementation Study of an Encrypted Federated Learning System for IoT Devices
?? Scientific Context and Motivation
The growing demand for embedded AI in IoT devices raises critical questions related to data privacy, computational efficiency, and energy autonomy. Federated Learning (FL) has emerged as a promising paradigm for decentralized model training, allowing data to remain local. However, combining FL with Homomorphic Encryption (HE) to ensure strong privacy introduces significant technical challenges when deployed on resource-constrained platforms.
This thesis aims to address these challenges through an FPGA-based hardware architecture, designed to support both FL and HE in a form factor suitable for portable and embedded systems.
?? Objectives:
This thesis aims to propose and evaluate a reconfigurable hardware architecture based on FPGA capable of implementing FL and HE in a resource- and energy-efficient manner. The work will involve:
- Optimizing embedded AI algorithms for hardware acceleration.
- Designing efficient hardware implementations of homomorphic encryption schemes.
- Exploring hybrid hardware/software co-design approaches.
- Developing advanced energy management strategies for autonomy.
?? Keywords:
Federated Learning · Homomorphic Encryption · FPGA · Embedded AI · IoT · Energy Optimization.
?? Supervision:
The research project will be conducted under the supervision of a multidisciplinary team from CentraleSupélec and other academic partners, combining expertise in digital systems, AI, and secure computing.
?? Candidate Profile:
We are looking for a highly motivated candidate with a strong academic background in embedded systems, digital design, and applied machine learning. Familiarity with fundamental concepts in data security, as well as experience with FPGA development tools and hardware/software co-design will be considered an asset.
?? Applications are open until April 28, 2025.
Funding details
Full funding including tuition fees and living expenses is available for this position. The scholarship covers all educational costs and provides a monthly stipend.
How to apply
Please submit your application including a cover letter, CV, academic transcripts, and contact information for two references. Applications should be sent via the online portal before the deadline.
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# EmbeddedAI # FPGA # IoT # EnergyOptimization # CentraleSupélec