Cong-Kha Pham

The University of Electro-Communications

Japan

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Articles (21)

Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme

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Year:

2024

A Trusted Execution Environment RISC-V System-on-Chip Compatible with Transport Layer Security 1.3

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Year:

2024

A High-Performance Non-Indexed Text Search System

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Year:

2024

Compacting Side-Channel Measurements With Amplitude Peak Location Algorithm

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Year:

2024

A Novel ECG Signal Quality Index Method Based on Skewness-MODWT Analysis

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Year:

2024

Accumulator-Based 16-Bit Processor for Wireless Sensor Nodes

Article Link

Year:

2024

Construction of Robust Lightweight S-Boxes Using Enhanced Logistic and Enhanced Sine Maps

Article Link

Year:

2024

Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber

Article Link

Year:

2024

A Multimode SHA-3 Accelerator based on RISC-V system

Article Link

Year:

2024

Compact and Low-Latency FPGA-Based NTT Architecture for CRYSTALS Kyber Post-Quantum Cryptography Scheme

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Year:

2024

A Survey of Post-Quantum Cryptography: Start of a New Race

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Year:

2023

Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor

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Year:

2023

Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC

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Year:

2023

Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis Attacks

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Year:

2023

Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA

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Year:

2023

A flexible and efficient FPGA-based random forest architecture for IoT applications

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Year:

2023

On the performance of non‐profiled side channel attacks based on deep learning techniques

Article Link

Year:

2023

Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor

Article Link

Year:

2023

Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC

Article Link

Year:

2023

A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment

Article Link

Year:

2023

Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications

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Year:

2022

Collaborators (3)

Tuan Kiet Dang

The University of Electro-Communications

JAPAN

Thai-Ha Tran

The University of Electro-Communications

JAPAN

Trong-Thuc Hoang

Assistant Professor

The University of Electro-Communications

JAPAN

Cong-Kha Pham

Research Interests

Explore related searches

Contact this professor

Articles (21)

Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme

A Trusted Execution Environment RISC-V System-on-Chip Compatible with Transport Layer Security 1.3

A High-Performance Non-Indexed Text Search System

Compacting Side-Channel Measurements With Amplitude Peak Location Algorithm

A Novel ECG Signal Quality Index Method Based on Skewness-MODWT Analysis

Accumulator-Based 16-Bit Processor for Wireless Sensor Nodes

Construction of Robust Lightweight S-Boxes Using Enhanced Logistic and Enhanced Sine Maps

Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber

A Multimode SHA-3 Accelerator based on RISC-V system

Compact and Low-Latency FPGA-Based NTT Architecture for CRYSTALS Kyber Post-Quantum Cryptography Scheme

A Survey of Post-Quantum Cryptography: Start of a New Race

Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor

Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC

Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis Attacks

Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA

A flexible and efficient FPGA-based random forest architecture for IoT applications

On the performance of non‐profiled side channel attacks based on deep learning techniques

Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor

Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC

A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment

Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications

Collaborators (3)

Tuan Kiet Dang

Thai-Ha Tran

Trong-Thuc Hoang

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