PhD Opportunity in Energy-Efficient Edge AI Hardware and Transformer Accelerator Design at BITS Pilani
PhD Research Opportunity at
Birla Institute of Technology and Science, Pilani (BITS Pilani), Pilani Campus, Rajasthan
under CREST (Center for Research Excellence in Semiconductor Technologies).
The project is titled
“A Reconfigurable Sparse-Quantized Transformer Accelerator for Energy-Efficient Edge AI Inference.”
The research sits at the intersection of
Electrical Engineering
and
Computer Science
, with strong emphasis on
Edge AI
,
Transformer accelerator
design,
VLSI
,
FPGA prototyping
,
ASIC hardware design
,
computer architecture
, sparse computing, and quantization.
The work aims to develop hardware accelerators for efficient Transformer inference on edge devices, addressing memory, power, and compute constraints. Planned technical directions include dynamic sparse data encoding (CSR), sparse fixed-point processing elements, hardware-based workload balancing, FPGA prototyping, and silicon-ready ASIC/IP core development.
Eligibility includes an M.E./M.Tech/M.S. in Electronics, Communication, Instrumentation, Computer Science, or allied areas, or a B.E./B.Tech in Electronics, Instrumentation, Communications, or allied areas. Desired background includes digital design, VLSI architecture, computer architecture, FPGA/ASIC design, and machine learning fundamentals. GATE is preferred but not mandatory.
Funding support is listed as
JRF ₹37,000/month
and
SRF ₹42,000/month
, with fellowship duration as per BITS Pilani norms.
Application deadline:
5 October 2026. Interested candidates should apply using the provided link and may contact Dr. Ramesh Sambangi at [email protected] for queries.
