Xavier Vilajosana profile picture

Xavier Vilajosana

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Prof. at Universitat Oberta de Catalunya

Universitat Oberta de Catalunya
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Positions (2)

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Joan Melià

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Universitat Oberta de Catalunya

PhD Position in Energy-Autonomous Ambient IoT Communication at Universitat Oberta de Catalunya

The Universitat Oberta de Catalunya (UOC) in Barcelona, Spain, is offering a fully funded PhD position focused on enabling energy-autonomous connectivity for Ambient IoT communication. The successful candidate will join the Doctoral School and work on the cutting-edge GAIA project, which aims to develop sustainable, biodegradable IoT devices with minimal ecological impact. The research will address major challenges in large-scale Ambient IoT deployments, including boosting the link budget of passive devices, developing novel backscatter mechanisms, and designing efficient energy harvesting protocols using environmental sources like solar energy. The project is coordinated by UOC faculty members Joan Melià and Xavier Vilajosana, and offers collaboration opportunities with top European labs and the possibility of an internship at Aalborg University. Applicants should have an MSc in Telecommunications, Computer Science, Electrical Engineering, or a related field, with strong programming skills and experience in wireless networks and signal processing. The position provides a 3-year full-time contract, access to advanced SDR, RF, and AIoT infrastructure, and is part of a larger initiative funded by Horizon Europe EIC Pathfinder. The interdisciplinary environment combines hardware, networks, and materials science, and supports responsible research and innovation. Applications should be sent to [email protected], including a CV, motivation letter, and academic transcript. The starting date is flexible, with a target of mid-2026.

2 months ago

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Xavier Vilajosana

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Universitat Oberta de Catalunya

Postdoctoral Researcher: Event-Driven GNSS Receivers for Ultra-Low-Power Positioning (Fixed-term)

Postdoctoral Researcher: Event-Driven GNSS Receivers for Ultra-Low-Power Positioning at the Universitat Oberta de Catalunya (UOC) , Barcelona, Spain. This fixed-term, full-time postdoctoral position sits within UOC-TECH and the Wireless Networks (WiNe) research group . The project explores a new approach to GNSS receiver design: instead of conventional continuous high-rate sampling, it investigates event-driven GNSS processing based on sparse, information-bearing events. The goal is to reduce computation, data movement, and energy consumption while preserving the synchronization and positioning performance needed for practical navigation. The research is highly interdisciplinary and combines GNSS and satellite navigation , statistical signal processing , estimation theory , RF and receiver design , event-based sensing , neuromorphic computing , analog and mixed-signal processing , and embedded low-power systems . The successful candidate may work on mathematical modelling of sparse GNSS representations, acquisition and tracking algorithms, asynchronous inference, robust PVT estimation, and mappings of new methods onto SDR, analog/mixed-signal, or other low-power hardware platforms. The team aims to produce new signal-processing methods, experimental receiver prototypes, comparative benchmarks against conventional architectures, and publications in leading international conferences and journals. Open-source software, datasets, or other research artefacts may also be produced where appropriate. The post is especially suitable for researchers who like moving between theory and experiments and who want to contribute to a potentially new class of ultra-low-power GNSS receivers. Prior GNSS experience is helpful but not required if you have strong expertise in signal processing, estimation, communications, sensing, embedded systems, or related areas. Eligibility highlights: PhD or equivalent in a related engineering or mathematical field; strong research experience in signal processing/estimation/wireless/RF or low-power sensing; strong programming skills; desirable SDR, embedded, FPGA, or prototyping experience; and oral/written Catalan and Spanish plus English at B2 level or higher. Deadline: 3 November 2026 at 23:59 (Europe/Madrid). Start date: 1 January 2027 (or agreed after recruitment). How to apply: register in the UOC candidate portal, then submit a CV, academic records, and motivation letter. The letter should explain your background, relevant experience, fit with the technical requirements, and interest in the project.

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