Dominique Drouin
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PhD – Optimization of Micropillar Microfabrication Process for Fan-Out Wafer Level Packaging Université de Sherbrooke in Canada
Degree Level
PhD
Field of study
Mechanical Engineering
Funding
Full funding availableDeadline
Dec 30, 2026
Country
Canada
University
Université de Sherbrooke

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About this position
PhD opportunity at the Université de Sherbrooke in Canada, focused on the optimization of a micropillar microfabrication process for Fan-Out Wafer Level Packaging (FOWLP). The project sits at the intersection of advanced microelectronics, heterogeneous integration, and manufacturing process development for high-performance computing, AI, aerospace, and defense applications.
The thesis aims to develop high-density vertical interconnections with a pitch below 30 μm, compatible with a manufacturing die-to-wafer (D2W) assembly environment for multi-chip integration. The work addresses key challenges in advanced packaging, including thermomechanical strength, electromigration resistance, warpage control, and accurate die placement during flip-chip bonding.
The student will work on creating fine-pitch, ductile heterogeneous solder micro-bumps for active chips on reconstructed wafers. Main research tasks include a literature review on microbump fabrication and ultra-fine-pitch Cu/Ag/Sn micropillars, optimization of clean-room microfabrication steps such as lithography, alignment, and exposure, electroplating parameter optimization, development of thermocompression bonding conditions for D2W assembly, and detailed morphological characterization of micropillar uniformity and quality across wafers.
Supervision will be provided by Professor Dominique Drouin as part of an IBM/NSERC Alliance Project on Multi-Chip Heterogeneous Integration for High-Performance Computing. The research will be carried out primarily at the Interdisciplinary Institute for Technological Innovation (3IT) at the Université de Sherbrooke and at the MiQro Innovation Collaborative Center (C2MI) in Bromont. This environment offers access to strong academic-industry collaboration and state-of-the-art facilities in microelectronics, MEMS, and encapsulation.
Applicants should hold a Master’s degree or equivalent in micro-nanotechnologies, materials science, or a related engineering field. Experience or interest in clean-room microfabrication, electrical characterization, advanced packaging, and integration processes is desirable. Good communication skills in English or French are required, along with autonomy, adaptability, and teamwork.
The application deadline is 30 December 2026 at 00:05 America/Toronto time. Applications are to be sent by email to [email protected].
Funding details
Full funding including tuition fees and living expenses is available for this position. The scholarship covers all educational costs and provides a monthly stipend.
How to apply
Please submit your application including a cover letter, CV, academic transcripts, and contact information for two references. Applications should be sent via the online portal before the deadline.
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