Keio University
4 weeks ago
Specially Appointed Faculty and Researcher Positions in Semiconductor Devices and Nanotechnology at Keio University Keio University in Japan
Degree Level
Postdoc
Field of study
Electrical Engineering
Funding
Annual income is 4 million to 8 million yen for all job types. Employment is contract-based and fixed-term, with a one-year contract renewable by mutual agreement up to 3 years, or 5 years if passing through the Stage Gate.
Deadline
Dec 31, 2026
Country
Japan
University
Keio University

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About this position
Keio University Graduate School of Science and Technology is recruiting specially appointed faculty members and researchers for JST-related work in semiconductor engineering, semiconductor processes, and semiconductor devices.
The position is based at Tada Laboratory, Faculty of Science and Engineering / Graduate School of Science and Technology, Keio University, with work involving thin-film deposition, semiconductor wafer processing in a cleanroom, device fabrication and evaluation, and TEG design. Candidates with experience or strong interest in semiconductor manufacturing processes and semiconductor circuit design are especially encouraged to apply.
This call covers multiple contract roles: specially appointed professor, associate professor, lecturer, assistant professor, and researcher/postdoctoral equivalent. The post is fixed-term and non-tenure-track. Salary is stated as 4 million to 8 million yen annually, with terms determined under Keio University regulations.
Eligible applicants include those with a Ph.D., Master's, or Bachelor's degree, as well as those expected to obtain a doctoral degree or who earned one within the last few years. The university also notes that equivalent work experience may be considered.
The workplace is Keio University Yagami Campus, Yokohama, Kanagawa, Japan. The application window runs from August 7, 2026 to December 31, 2026, though the search may close earlier once suitable candidates are found. The expected start is as soon as possible after September 2026.
To apply, prepare a CV, list of research achievements, up to five major publications, a one-page research summary, a one-page statement describing your relevant knowledge and contributions, and contact information or a recommendation letter from one referee. Applications are submitted by email to [email protected].
Funding details
Annual income is 4 million to 8 million yen for all job types. Employment is contract-based and fixed-term, with a one-year contract renewable by mutual agreement up to 3 years, or 5 years if passing through the Stage Gate.
What's required
Applicants should have a Ph.D., Master's, or Bachelor's degree, or be expected to obtain a doctoral degree. Equivalent work experience is also acceptable. Candidates with knowledge of semiconductor manufacturing processes and semiconductor circuit design are especially welcome. The post is open to those who have obtained a doctoral degree within the last few years.
How to apply
Prepare the required documents including CV, publication list, up to 5 major publications, research summary, statement of relevant knowledge, and one reference contact or recommendation letter. Submit via email to [email protected]; JREC-IN portal application is not available.
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