Francisco Gamiz

Professor. Head of Nanoelectronics Laboratory

Universidad de Granada

Spain

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Professor Francisco Gamiz serves as the Head of the Nanoelectronics Laboratory at Universidad de Granada, Spain. His research primarily focuses on nanoelectronics, with recent articles exploring topics such as multi-subband Monte Carlo simulations, capacitance of nanosheet transistors, and low-frequency noise in InGaAs-OI transistors. Additionally, he has investigated enhancements in AlGaN/GaN high-electron-mobility transistors and the applications of 2D materials for sensing solutions.

Articles (14)

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2025

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2021

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2021

Collaborators (6)

Alexander Zaslavsky

Professor of Engineering and Physics

Brown University

UNITED STATES

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Luca Donetti

Profesor Titular de Universidad

Universidad de Granada

SPAIN

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Antonio Calomarde

Assistant Professor

Universitat Politècnica de Catalunya

SPAIN

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Carlos Marquez

Associate Professor

Universidad de Granada

SPAIN

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José Luis Padilla De La Torre

Universidad de Granada

SPAIN

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Carlos Navarro

Profesor Titular de Universidad (Associate Professor)

Universidad de Granada

SPAIN

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Francisco Gamiz

Research Interests

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Articles (14)

MULHACEN, enhanced multi-subband Monte Carlo simulator for nonplanar FETs

On the Capacitance of Nanosheet Transistors

Low-Frequency Noise in InGaAs-OI Transistors

Liquid-gate 2D material-on-insulator transistors for sensing applications

Improvement of AlGaN/GaN HEMTs Linearity Using Etched-Fin Gate Structure for Ka Band Applications

Improvement of AlGaN/GaN High-Electron-Mobility Transistor Radio Frequency Performance Using Ohmic Etching Patterns for Ka-Band Applications

Analysis of the Reformulated Source to Drain Tunneling Probability for Improving the Accuracy of a Multisubband Ensemble Monte Carlo Simulator

Influence of Punch Trough Stop Layer and Well Depths on the Robustness of Bulk FinFETs to Heavy Ions Impact

A Review of Sharp-Switching Band-Modulation Devices

Hysteresis in As-Synthesized MoS2 Transistors: Origin and Sensing Perspectives

Hysteresis in As-Synthesized MoS2 Transistors: Origin and Sensing Perspectives

Self-Consistent Enhanced S/D Tunneling Implementation in a 2D MS-EMC Nanodevice Simulator

Self-Consistent Enhanced S/D Tunneling Implementation in a 2D MS-EMC Nanodevice Simulator

Improved Retention Characteristics of Z2-FET Employing Half Back-Gate Control

Collaborators (6)

Alexander Zaslavsky

Luca Donetti

Antonio Calomarde

Carlos Marquez

José Luis Padilla De La Torre

Carlos Navarro

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