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Jaewon Jang

Assistant Prof.

Kyungpook National University

South Korea

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Research Interests

Hardware Engineering

80%

Materials Chemistry

80%

Semiconductor Physics

80%

Memristor Technology

60%

Thin-film Transistors

50%

Organic Electronics

40%

Thin Film Deposition

30%

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Articles14

UV/Ozone-Treated and Sol–Gel-Processed Y2O3 Insulators Prepared Using Gelation-Delaying Precursors

Article Link

Year:

2024

Dependence of Positive Bias Stress Instability on Threshold Voltage and Its Origin in Solution-Processed Aluminum-Doped Indium Oxide Thin-Film Transistors

Article Link

Year:

2024

Effect of Electrochemically Active Top Electrode Materials on Nanoionic Conductive Bridge Y2O3 Random-Access Memory

Article Link

Year:

2024

Improving the Nonvolatile Memory Characteristics of Sol–Gel-Processed Y2O3 RRAM Devices Using Mono-Ethanolamine Additives

Article Link

Year:

2024

Low-Temperature Enhancement-Mode Amorphous Oxide Thin-Film Transistors in Solution Process Using a Low-Pressure Annealing

Article Link

Year:

2023

Sol–Gel-Processed Y2O3 Multilevel Resistive Random-Access Memory Cells for Neural Networks

Article Link

Year:

2023

Sol–Gel-Processed Y2O3–Al2O3 Mixed Oxide-Based Resistive Random-Access-Memory Devices

Article Link

Year:

2023

Simulation of Capacitorless DRAM Based on the Polycrystalline Silicon Nanotube Structure with Multiple Grain Boundaries

Article Link

Year:

2023

Improvement in Switching Characteristics and Bias Stability of Solution-Processed Zinc–Tin Oxide Thin Film Transistors via Simple Low-Pressure Thermal Annealing Treatment

Article Link

Year:

2023

Improved Tunneling Property of p+Si Nanomembrane/n+GaAs Heterostructures through Ultraviolet/Ozone Interface Treatment

Article Link

Year:

2022

Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon

Article Link

Year:

2022

Design of a Capacitorless DRAM Based on a Polycrystalline-Silicon Dual-Gate MOSFET with a Fin-Shaped Structure

Article Link

Year:

2022

Improved Environment Stability of Y2O3 RRAM Devices with Au Passivated Ag Top Electrodes

Article Link

Year:

2022

Physico-Chemical Origins of Electrical Characteristics and Instabilities in Solution-Processed ZnSnO Thin-Film Transistors

Article Link

Year:

2022

Collaborators3

Jin-Hyuk Bae

Kyungpook National University

SOUTH KOREA

Sangwoo Lee

Kyungpook National University

SOUTH KOREA

In-Man Kang

Kyungpook National University

SOUTH KOREA

How do I reach out?

Meet Kite AI

Jaewon Jang

Assistant Prof.

How do I reach out?

Contact this professor

Research Interests

Ask ApplyKite AI

Articles14

UV/Ozone-Treated and Sol–Gel-Processed Y<sub>2</sub>O<sub>3</sub> Insulators Prepared Using Gelation-Delaying Precursors

Dependence of Positive Bias Stress Instability on Threshold Voltage and Its Origin in Solution-Processed Aluminum-Doped Indium Oxide Thin-Film Transistors

Effect of Electrochemically Active Top Electrode Materials on Nanoionic Conductive Bridge Y<sub>2</sub>O<sub>3</sub> Random-Access Memory

Improving the Nonvolatile Memory Characteristics of Sol–Gel-Processed Y<sub>2</sub>O<sub>3</sub> RRAM Devices Using Mono-Ethanolamine Additives

Low-Temperature Enhancement-Mode Amorphous Oxide Thin-Film Transistors in Solution Process Using a Low-Pressure Annealing

Sol–Gel-Processed Y<sub>2</sub>O<sub>3</sub> Multilevel Resistive Random-Access Memory Cells for Neural Networks

Sol–Gel-Processed Y<sub>2</sub>O<sub>3</sub>–Al<sub>2</sub>O<sub>3</sub> Mixed Oxide-Based Resistive Random-Access-Memory Devices

Simulation of Capacitorless DRAM Based on the Polycrystalline Silicon Nanotube Structure with Multiple Grain Boundaries

Improvement in Switching Characteristics and Bias Stability of Solution-Processed Zinc–Tin Oxide Thin Film Transistors via Simple Low-Pressure Thermal Annealing Treatment

Improved Tunneling Property of p+Si Nanomembrane/n+GaAs Heterostructures through Ultraviolet/Ozone Interface Treatment

Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon

Design of a Capacitorless DRAM Based on a Polycrystalline-Silicon Dual-Gate MOSFET with a Fin-Shaped Structure

Improved Environment Stability of Y<sub>2</sub>O<sub>3</sub> RRAM Devices with Au Passivated Ag Top Electrodes

Physico-Chemical Origins of Electrical Characteristics and Instabilities in Solution-Processed ZnSnO Thin-Film Transistors

Collaborators3

Jin-Hyuk Bae

Sangwoo Lee

In-Man Kang

How do I reach out?