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Jong Kyung Park

Professor

Seoul National University

South Korea

Research Interests

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About

Jong Kyung Park is a Professor at Seoul National University of Science and Technology in South Korea. His research primarily focuses on semiconductor systems, including topics such as current flow analysis, polymer dry etching processes, and charge trap flash devices. Recent contributions include advancements in 3D NAND flash memory and innovative techniques for reducing interface resistance in semiconductors.

Articles (17)

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Jong Kyung Park

Research Interests

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About

Articles (17)

Analysis of Recovery Characteristics and Parameter Dependence Under Dishing in Cu/SiO2 Interconnect Bonding Structures

Overcoming BEOL Thermal Constraints in Heterogeneous Integration of $α$-Ga$_{2}$O$_{3}$ UV-C Photodetectors Using Low-Temperature Thermal Compression Bonding

Bonding-Based Method to Prevent Contamination in Polymer Integration for Semiconductor Applications

A Novel Read Disturbance-Free AND-Type Backside Ferroelectric Field-Effect Transistor (BF-FET) Array for Read-Intensive Artificial Intelligence

Grain Boundary Engineering of Pt Passivation Layers for Enhanced Low-Temperature Copper Bonding

Advanced Polymer Dry Etching Processes for Enhanced Cu/Polymer Hybrid Bonding

Layout Design Strategies for Scaling Down Semiconductor Systems Based on Current Flow Analysis in Interconnect

Backside Ferroelectric-assisted Charge Trap Flash (BF-CTF) Device for a Wide Memory Window and Read Disturbance-Free Performance

CatBoost-Based Z-Interference Modeling for Accurate Prediction of Threshold Voltage Distribution in Scaled 3-D NAND Flash

Improving cell current in 3D NAND flash memory with fixed oxide charge

Improving Contact Resistivity Extraction by Optimizing Current Distribution in Cu–Cu Bonding

Ultralow-Temperature Deposition and Enhanced Bonding of SiCN Films for Advanced 3-D Integration

Analyzing the Influence of Source/Drain Growth Height and Lateral Growth Depth in FinFETs through XGBoost and SHAP

Reducing Interface Resistance in Semiconductor System Through the Integration of Graphene

Analysis of Signal Transmission Efficiency in Semiconductor Interconnect and Proposal of Enhanced Structures

Innovative Programming Approaches to Address Z-Interference in High-Density 3D NAND Flash Memory

A New 3-Dimensional Graphene Vertical Transistor with Channel Length Determination Using Dielectric Thickness

Collaborators (5)

Byung Chul Jang

Dong Jin Ji

Wan Sik Hwang

Seul Ki Hong

Min Ju Kim

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