Krzysztof Posobkiewicz

This article presents the results of the investigations concerning the influence of the printed circuit board (PCB) layout design on self and transfer transient thermal impedances characterizing thermal phenomena occurring in the network containing two power MOSFETs. The tested devices have the case D2PAK and are soldered to the PCB using the surface mount technology (SMT). The measurement method is described. The tested transistors are presented with the used PCBs on which they are mounted. The obtained measurement results of the mentioned thermal parameters of the tested transistors operating on all the tested PCBs are shown and discussed. The influence of a cooling area of the tested PCBs on the parameters describing self and transfer transient thermal impedances is analyzed.