Pekka Jääskeläinen

University of Tampere

Finland

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Articles (20)

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2025

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2022

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2020

Collaborators (17)

Topi Leppänen

University of Tampere

FINLAND

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Shayan Tabatabaei-Nikkhah

Eindhoven University of Technology

NETHERLANDS

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Marc Geilen

Dr. at Eindhoven University of Technology

Eindhoven University of Technology

NETHERLANDS

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Erwan Leria

Tampere University

FINLAND

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Francisco Barranco

Universidad de Granada

SPAIN

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Jakub Žádník

Tampere University

FINLAND

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Eduardo Ros

Catedrático de Universidad (Full Professor)

Universidad de Granada

SPAIN

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Kati Tervo

University of Tampere

FINLAND

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Kari Hepola

University of Tampere

FINLAND

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Lubomír Bulej

Associate Professor

Univerzita Karlova Matematicko-fyzikální fakulta

CZECH REPUBLIC

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Joonas Iisakki Multanen

University of Tampere

FINLAND

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Holger Blume

Professor

Leibniz University Hannover

GERMANY

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Petrus Kivi

University of Tampere

FINLAND

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Julius Ikkala

University of Tampere

FINLAND

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Henk Corporaal

Professor Embedded System Architectures

Eindhoven University of Technology

NETHERLANDS

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Barry de Bruin

Eindhoven University of Technology

NETHERLANDS

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Jarno Vanne

University of Tampere

FINLAND

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Pekka Jääskeläinen

Research Interests

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Articles (20)

Efficient reconfigurable system for home monitoring of the elderly via action recognition

Correction to “CV-Cast: Computer Vision–Oriented Linear Coding and Transmission”

CV-Cast: Computer Vision-Oriented Linear Coding and Transmission

Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions

PoCL-R: An open standard based heterogeneous offloading layer with server side scalability

Dynamic Load Balancing for Real-Time Multiview Path Tracing on Multi-GPU Architectures

Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode

R-Blocks: an Energy-Efficient, Flexible, and Programmable CGRA

Energy-efficient instruction compression with programmable dictionaries

Bitstream Database-Driven FPGA Programming Flow Based on Standard OpenCL

Efficient OpenCL system integration of non-blocking FPGA accelerators

AEx

Energy-Efficient Instruction Delivery in Embedded Systems with Domain Wall Memory

Cross-vendor programming abstraction for diverse heterogeneous platforms

Image and Video Coding Techniques for Ultra-low Latency

Real-Time Rendering of Point Clouds With Photorealistic Effects: A Survey

Design and management of image processing pipelines within CPS

Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments

Energy Efficient Low Latency Multi-issue Cores for Intelligent Always-On IoT Applications

Systematic Evaluation of the Quality Benefits of Spatiotemporal Sample Reprojection in Real-Time Stereoscopic Path Tracing

Collaborators (17)

Topi Leppänen

Shayan Tabatabaei-Nikkhah

Marc Geilen

Erwan Leria

Francisco Barranco

Jakub Žádník

Eduardo Ros

Kati Tervo

Kari Hepola

Lubomír Bulej

Joonas Iisakki Multanen

Holger Blume

Petrus Kivi

Julius Ikkala

Henk Corporaal

Barry de Bruin

Jarno Vanne

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