Piet Wambacq

Professor

Vrije Universiteit Brussel

Belgium

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Professor Piet Wambacq is a faculty member at Vrije Universiteit Brussel in Belgium. His research areas encompass advanced topics in analog and digital circuit design, including delta-sigma ADCs, RF/microwave circuits, and power amplifiers. Recent publications highlight innovations in CMOS technology and applications in quantum computing, with a focus on achieving high efficiency and low power consumption in integrated circuits.

Articles (14)

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2025

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2025

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2025

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2025

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2023

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2023

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2023

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2022

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2022

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2022

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2022

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2022

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2022

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2022

Collaborators (5)

Johan Nguyen

Vrije Universiteit Brussel

BELGIUM

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Sehoon Park

Assistant Professor

Kyungpook National University

SOUTH KOREA

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Kristiaan De Greve

Professor

KU Leuven

BELGIUM

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Xinyan Tang

Vrije Universiteit Brussel

BELGIUM

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Alican Çağlar

Vrije Universiteit Brussel

BELGIUM

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Piet Wambacq

Research Interests

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Articles (14)

A Scalable mK DC Demultiplexer With Extremely Low OFF-Leakage CMOS Switches for Biasing of Spin Qubits

A 70-MHz Bandwidth Time-Interleaved Noise-Shaping SAR-Assisted Delta-Sigma ADC With Digital Cross-Coupling in 28-nm CMOS

A Compact Current-Reusing 6-mW 66-92 GHz Frequency Quadrupler With 5% Peak Power Added Efficiency and >36 dBc Harmonic Rejection in 22-nm FDSOI CMOS

Toward Interpretable Digital Predistortion: A Frequency-Domain Behavioral Approach

Design and Analysis of a 4.2 mW 4 K 6–8 GHz CMOS LNA for Superconducting Qubit Readout

Design of a 10.56-Gb/s 64-QAM Polar Transmitter at 60 GHz in 28-nm CMOS

ISSCC 2023 Plenary Session [Conference Reports]

Design and Analysis of a 140-GHz T/R Front-End Module in 22-nm FD-SOI CMOS

A 120–140-GHz LNA in 250-nm InP HBT

A Stacked Segmented Adaptive Power Amplifier in 22nm FD-SOI

A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS

A 950 MHz Clock 47.5 MHz BW 4.7 mW 67 dB SNDR Discrete Time Delta Sigma ADC Leveraging Ring Amplification and Split-Source Comparator Based Quantizer in 28 nm CMOS

A D-Band Low-Power and High-Efficiency Frequency Multiply-by-9 FMCW Radar Transmitter in 28-nm CMOS

Design and Analysis of 55–63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS

Collaborators (5)

Johan Nguyen

Sehoon Park

Kristiaan De Greve

Xinyan Tang

Alican Çağlar

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