Steven Bos

PhD Research Fellow in Multi-Level Resistive Memory Cells for Ternary Computing at the University of South-Eastern Norway This PhD position is hosted by the Faculty of Technology, Natural Sciences and Maritime Sciences at the University of South-Eastern Norway (USN), with the work carried out at Campus Vestfold in Borre, Norway. The project sits within the Department of Microsystems and the USN Ternary Research Group, offering a highly interdisciplinary environment at the intersection of emerging memory devices, post-binary electronics, and ternary computing. The doctoral project focuses on fabricating and characterizing multi-level resistive memory technology, especially ReRAM/memristor devices optimized for balanced ternary states (-1, 0, 1). The research addresses major challenges in multi-level memory, such as device-to-device variation, cycle-to-cycle variation, drift, read disturb, and non-linear programming. The aim is to develop reproducible ternary ReRAM cells with well-separated resistance levels and to explore their use in applications such as ternary neural networks, ultra-efficient event-based cameras, high-density storage, and mixed-radix 3D systems-on-chip. The position is a three-year, 100% full-time PhD research appointment with no teaching obligations. The doctoral programme in Technology includes coursework, an article-based thesis, research dissemination, a trial lecture, and public defence. Admission to the doctoral programme must be applied for and granted within three months of starting the position. Research activities are centered on two possible tasks. Task 1, the main focus, involves fabrication of ternary ReRAM cells using sputtering or atomic layer deposition in USN’s MST lab and, where necessary, other NorFab cleanroom infrastructure. Extensive electrical and structural characterization is expected, including pulsed and DC I-V measurements, retention, endurance, variability analysis, and automated measurement setups designed to produce publishable results. Task 2 explores the design of an on/off-chip ternary ReRAM controller, including mixed-signal and mixed-radix circuitry, ternary HDL, and RTL-to-GDS flows for commercially available ReRAM devices. The project is especially suitable for candidates with backgrounds in micro/nanoelectronics, electrical/electronic engineering, physics, nanotechnology, materials science, or related fields. Strong preparation in chip design, cleanroom fabrication, materials/device engineering, and experimental characterization is highly valued. Experience with Cadence Virtuoso, SPICE-based simulation, Verilog-A, SystemVerilog, VHDL, or instrument automation will strengthen an application. A master’s degree of 120 ECTS or equivalent with a weighted average grade of B or higher is required, together with good English language skills documented by an accepted certificate unless exempt. USN highlights a stimulating and growing research environment, career advice throughout the doctoral programme, an inclusive working culture, and the opportunity to take Norwegian language courses. The salary follows the Norwegian State salary scale for PhD research fellows, position code 1017, at NOK 550,800 per year, with standard pension contributions and related benefits. The position also requires compliance with export licence regulations. Applications must be submitted through Jobbnorge by 22 October 2026 at 23:59 (Europe/Oslo). Required documents include a motivation letter, CV, a concise preliminary research proposal of 2–3 pages, certified degree documents, recognition from HK-dir if applicable, grading explanation, thesis, proof of English proficiency, publications, and references.