Walterio Mayol-Cuevas
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Articles (9)
Year:
2023
Year:
2023
Vision processing for control of agile autonomous robots requires low-latency computation, within a limited power and space budget. This is challenging for conventional computing hardware. Parallel processor arrays (PPAs) are a new class of vision sensor devices that exploit advances in semiconductor technology, embedding a processor within each pixel of the image sensor array. Sensed pixel data are processed on the focal plane, and only a small amount of relevant information is transmitted out of the vision sensor. This tight integration of sensing, processing, and memory within a massively parallel computing architecture leads to an interesting trade-off between high performance, low latency, low power, low cost, and versatility in a machine vision system. Here, we review the history of image sensing and processing hardware from the perspective of in-pixel computing and outline the key features of a state-of-the-art smart camera system based on a PPA device, through the description of the SCAMP-5 system. We describe several robotic applications for agile ground and aerial vehicles, demonstrating PPA sensing functionalities including high-speed odometry, target tracking, obstacle detection, and avoidance. In the conclusions, we provide some insight and perspective on the future development of PPA devices, including their application and benefits within agile, robust, adaptable, and lightweight robotics.
Year:
2022
Year:
2022
Year:
2021
Year:
2021
Year:
2021
Year:
2021
Year:
2020
Collaborators (5)
Piotr Dudek
The University of Manchester
Francisco Javier Amorós Espí
Adjunct Professor
Universidad Pontificia Comillas
Dima Damen
University of Bristol
Casimir Ludwig
University of Bristol
Thomas Richardson
University of Bristol
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