Muhammad Rashid

To perform a comprehensive assessment of important infrastructures (like bridges), the process of structural health monitoring (SHM) is employed. The development and implementation of SHM systems are generally based on wireless sensor networks (WSN) platforms. However, most of the WSN platforms are battery-powered, and therefore, have a limited battery lifetime. The power constraint is generally addressed by applying energy harvesting (EH) technologies. As a result, there exists a plethora of WSN platforms and EH techniques. The employment of a particular platform and technique are important factors during the development and implementation of SHM systems and depend upon various operating conditions. Therefore, there is a need to perform a systematic literature review (SLR) for WSN platforms and EH techniques in the context of SHM for bridges. Although state-of-the-art review articles present multiple angles of the field, there is a lack of an SLR presenting an in-depth comparative study of different WSN platforms and EH techniques. Moreover, a systematic analysis is also needed for the exploration of other design considerations such as inspection scale (global/local), response type (static/dynamic), and types of sensors. As a result, this SLR selects 46 articles (during 2007–2023), related to EH techniques and WSN platforms in SHM for bridges. The selected articles are classified into three groups: WSN platforms, energy harvesting techniques, and a combination of both. Subsequently, a comparative analysis of WSN platforms and EH techniques is made. Furthermore, the selected articles (total = 46) are also explored in terms of sensor type, inspection scale, and response type. As a result, 17 different sensor types are identified. This research is significant as it may facilitate the various stakeholders of the domain during the selection of appropriate WSN platforms, EH techniques, and related design issues.

This research presents a novel binary Edwards curve (BEC) accelerator designed specifically for resource-constrained embedded systems. The proposed accelerator incorporates the fixed window algorithm, a two-stage pipelined architecture, and the Montgomery radix-4 multiplier. As a result, it achieves remarkable performance improvements in throughput and resource utilization. Experimental results, conducted on various Xilinx Field Programmable Gate Arrays (FPGAs), demonstrate impressive throughput/area ratios observed for GF(2233). The achieved ratios for Virtex-4, Virtex-5, Virtex-6, and Virtex-7 are 12.2, 19.07, 36.01, and 38.39, respectively. Furthermore, the processing time for one-point multiplication on a Virtex-7 platform is 15.87 µs. These findings highlight the effectiveness of the proposed accelerator for improved throughput and optimal resource utilization.