Muhammad Yousuf Irfan Zia

University of Malaga
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Articles (10)

This research presents a novel binary Edwards curve (BEC) accelerator designed specifically for resource-constrained embedded systems. The proposed accelerator incorporates the fixed window algorithm, a two-stage pipelined architecture, and the Montgomery radix-4 multiplier. As a result, it achieves remarkable performance improvements in throughput and resource utilization. Experimental results, conducted on various Xilinx Field Programmable Gate Arrays (FPGAs), demonstrate impressive throughput/area ratios observed for GF(2233). The achieved ratios for Virtex-4, Virtex-5, Virtex-6, and Virtex-7 are 12.2, 19.07, 36.01, and 38.39, respectively. Furthermore, the processing time for one-point multiplication on a Virtex-7 platform is 15.87 µs. These findings highlight the effectiveness of the proposed accelerator for improved throughput and optimal resource utilization.

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2023

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2023

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2023

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2023

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2023

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2023

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2023

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2023

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2022

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2022

Collaborators (3)

PABLO OTERO ROTH

Profesor Titular de Universidad

University of Malaga

SPAIN
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Saud Alotaibi

-

SAUDI ARABIA
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Muhammad Rashid

-

SAUDI ARABIA
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