Paul Leroux

Professor

KU Leuven

Belgium

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Articles (12)

Single-Event Effect Responses of CMOS Integrated Planar Multiturn Inductors in LC-Tank Oscillators Under Heavy-Ion Microbeam Irradiation

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Year:

2024

High-Performance Wave Union Time-to-Digital Converter Implementation Based on Routing Path Delays of FPGA

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Year:

2024

5.7 ps Resolution Time-to-Digital Converter Implementation Using Routing Path Delays

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Year:

2023

Drift Resilient Frequency-Based Sensor Interface Architectures with Adaptive Clock Frequency

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Year:

2023

Proton Direct Ionization Upsets at Tens of MeV

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Year:

2023

Frequency-Based Sensor Interface with Dynamic Offset Compensation

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Year:

2023

Radiation-Tolerant Electronics

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Year:

2022

Impact of Aging Degradation on Heavy-Ion SEU Response of 28-nm UTBB FD-SOI Technology

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Year:

2022

Characterization of the Total Charge and Time Duration for Single-Event Transient Voltage Pulses in a 65-nm CMOS Technology

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Year:

2022

TID Sensitivity Assessment of Quadrature LC-Tank VCOs Implemented in 65-nm CMOS Technology

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Year:

2022

Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS

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Year:

2021

Single-Event Effect Responses of Integrated Planar Inductors in 65-nm CMOS

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Year:

2021

Collaborators (2)

Valentijn De Smedt

Assistant Professor

KU Leuven

BELGIUM

Arto Javanainen

FINLAND

Paul Leroux

Research Interests

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Contact this professor

Articles (12)

Single-Event Effect Responses of CMOS Integrated Planar Multiturn Inductors in LC-Tank Oscillators Under Heavy-Ion Microbeam Irradiation

High-Performance Wave Union Time-to-Digital Converter Implementation Based on Routing Path Delays of FPGA

5.7 ps Resolution Time-to-Digital Converter Implementation Using Routing Path Delays

Drift Resilient Frequency-Based Sensor Interface Architectures with Adaptive Clock Frequency

Proton Direct Ionization Upsets at Tens of MeV

Frequency-Based Sensor Interface with Dynamic Offset Compensation

Radiation-Tolerant Electronics

Impact of Aging Degradation on Heavy-Ion SEU Response of 28-nm UTBB FD-SOI Technology

Characterization of the Total Charge and Time Duration for Single-Event Transient Voltage Pulses in a 65-nm CMOS Technology

TID Sensitivity Assessment of Quadrature LC-Tank VCOs Implemented in 65-nm CMOS Technology

Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS

Single-Event Effect Responses of Integrated Planar Inductors in 65-nm CMOS

Collaborators (2)

Valentijn De Smedt

Arto Javanainen

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