Sungho Kang

Professor

Yonsei University

South Korea

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Articles (20)

GRAP: Efficient GPU-Based Redundancy Analysis Using Parallel Evaluation for Cross Faults

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Year:

2024

RA-Aware Fail Data Collection Architecture for Cost Reduction

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Year:

2024

A New Zero-Overhead Test Method for Low-Power AI Accelerators

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Year:

2024

A New Fail Address Memory Architecture for Cost-Effective ATE

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Year:

2024

A New ISA for High-Speed and Area-Efficient ALPG

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Year:

2024

A New Pipelined Output Data Reducer of BOST for Improved Parallelism

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Year:

2024

An Area-Efficient Systolic Array Redundancy Architecture for Reliable AI Accelerator

Article Link

Year:

2024

An Efficient Low Power BIST for Automotive SoC With Periodic Pattern Type Selection

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Year:

2024

PASS: Pattern-Sequence-Authentication–Based Secure Scan against Reverse Engineering Attacks

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Year:

2024

PETRA: Powerful Early Termination Based Redundancy Analysis

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Year:

2024

Scan Chain Architecture With Data Duplication for Multiple Scan Cell Fault Diagnosis

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Year:

2023

TRUST: Through-Silicon via Repair Using Switch Matrix Topology

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Year:

2023

Shift Left Quality Management System (QMS) Using a 3-D Matrix Scanning Method on System on a Chip

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Year:

2023

Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture

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Year:

2023

STRAIT: Self-Test and Self-Recovery for AI Accelerator

Article Link

Year:

2023

TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM

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Year:

2023

A Hybrid Test Scheme for Automotive IC in Multisite Testing

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Year:

2022

SPAR: A New Test-Point Insertion Using Shared Points for Area Overhead Reduction

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Year:

2022

Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis

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Year:

2022

Multibank Optimized Redundancy Analysis Using Efficient Fault Collection

Article Link

Year:

2022

Collaborators (2)

Seung Ho Shin

Yonsei University

SOUTH KOREA

Hayoung Lee

Assistant Professor

Ajou University

SOUTH KOREA

Sungho Kang

Research Interests

Explore related searches

Contact this professor

Articles (20)

GRAP: Efficient GPU-Based Redundancy Analysis Using Parallel Evaluation for Cross Faults

RA-Aware Fail Data Collection Architecture for Cost Reduction

A New Zero-Overhead Test Method for Low-Power AI Accelerators

A New Fail Address Memory Architecture for Cost-Effective ATE

A New ISA for High-Speed and Area-Efficient ALPG

A New Pipelined Output Data Reducer of BOST for Improved Parallelism

An Area-Efficient Systolic Array Redundancy Architecture for Reliable AI Accelerator

An Efficient Low Power BIST for Automotive SoC With Periodic Pattern Type Selection

PASS: Pattern-Sequence-Authentication–Based Secure Scan against Reverse Engineering Attacks

PETRA: Powerful Early Termination Based Redundancy Analysis

Scan Chain Architecture With Data Duplication for Multiple Scan Cell Fault Diagnosis

TRUST: Through-Silicon via Repair Using Switch Matrix Topology

Shift Left Quality Management System (QMS) Using a 3-D Matrix Scanning Method on System on a Chip

Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture

STRAIT: Self-Test and Self-Recovery for AI Accelerator

TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM

A Hybrid Test Scheme for Automotive IC in Multisite Testing

SPAR: A New Test-Point Insertion Using Shared Points for Area Overhead Reduction

Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis

Multibank Optimized Redundancy Analysis Using Efficient Fault Collection

Collaborators (2)

Seung Ho Shin

Hayoung Lee

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