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Trong-Thuc Hoang

Assistant Professor

The University of Electro-Communications

Japan

Research Interests

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Articles (25)

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Collaborators (3)

Cong-Kha Pham

The University of Electro-Communications

JAPAN

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Tuan Kiet Dang

The University of Electro-Communications

JAPAN

View details

Thai-Ha Tran

The University of Electro-Communications

JAPAN

View details

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Trong-Thuc Hoang

Research Interests

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Articles (25)

ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications

A Timing-Constrained Design Methodology for Radix-2 k NTT in Polynomial Arithmetic

A Unified Approach to Strong PUF and TRNG Using Ring Generator for Cryptography

An Area-Time Efficient Hardware Architecture for ML-KEM Post-Quantum Cryptography Standard

Countering Side-Channel Attacks With a Dynamic S-Box Based on Affine Transformations and Gold Sequences

Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme

A Trusted Execution Environment RISC-V System-on-Chip Compatible with Transport Layer Security 1.3

A High-Performance Non-Indexed Text Search System

Realization of Authenticated One-Pass Key Establishment on RISC-V Micro-Controller for IoT Applications

Compacting Side-Channel Measurements With Amplitude Peak Location Algorithm

A Novel ECG Signal Quality Index Method Based on Skewness-MODWT Analysis

Accumulator-Based 16-Bit Processor for Wireless Sensor Nodes

Construction of Robust Lightweight S-Boxes Using Enhanced Logistic and Enhanced Sine Maps

Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber

High-Speed NTT Accelerator for CRYSTAL-Kyber and CRYSTAL-Dilithium

A Survey of Post-Quantum Cryptography: Start of a New Race

Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor

Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC

A Unified PUF and Crypto Core Exploiting the Metastability in Latches

ChaCha20–Poly1305 Authenticated Encryption with Additional Data for Transport Layer Security 1.3

Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA

Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications

A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse

Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling

A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications

Collaborators (3)

Cong-Kha Pham

Tuan Kiet Dang

Thai-Ha Tran

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